Server/External PCIE Connectivity Worksteam: Difference between revisions
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===Past External PCIE Connectivity Events=== | ===Past External PCIE Connectivity Events=== | ||
* | * [https://www.youtube.com/watch?v=uBlDEFu37ug 19 December 2022 Call] | ||
* [https://www.youtube.com/watch?v=J-VcopXybws 12 December 2022 Call] | |||
Revision as of 02:03, 21 December 2022
Welcome to the OCP External PCIE Connectivity WIKI
External PCIE Connectivity is a Worksteam within the Server Project.
Leadership
Public Mailing List
- Page: https://ocp-all.groups.io/g/ocp-external-pcie-connectivity/
- Post: ocp-external-pcie-connectivity@OCP-All.groups.io
- Subscribe: ocp-external-pcie-connectivity+subscribe@OCP-All.groups.io
- Unsubscribe: ocp-external-pcie-connectivity+unsubscribe@OCP-All.groups.io
Scope
To document the various industry usage-model scenarios and requirements for rack-level disaggregated NVMe and/or CXL inter-connected Compute, Acceleration, Memory and Storage modules using PCIe Gen5 & Gen6 external Direct Attached(DAC), Active Electrical(AEC) and Active Optical(AOC) Cables. The Workstream will not explore any specific implementation solutions at this time; however, a future industry standards committee will be formed by willing members aiming to materialize the requirement output of this Workstream into a complete standard cabling specification.
Documents
- Coming Soon